VLSI implementation of moment invariants for automated inspection

Abstract

The design of a VLSI ASIC (application-specific integrated circuit) for use in automated inspection is described. The inspection scheme uses M.K. Hu's (1962) and S. Maitra's (1979) algorithms for moment invariants. A prototype design that resolved the long delay time of the multiplier by custom designing adder cells based on the Manchester carry chain was generated. The prototype ASIC is currently being fabricated in 2.0- mu m CMOS technology and has been simulated at 20 MHz. The final ASICs will be used in parallel at the board level to achieve the 230 MOPS necessary to perform moment-invariant algorithms in real time on 512*512 pixel images with 256 gray scales.<>