Three-level converters with selective Harmonic Elimination PWM for HVDC application

Abstract

In a voltage source converter (VSC) based HVDC system, the modulation scheme used is an important factor in achieving a desired harmonic performance with allowable semiconductor losses. In this paper, the use of selective Harmonic Elimination Pulse Width Modulation (HEPWM) for a three-level Neutral Point Clamped (NPC) converter in VSC based HVDC application will be discussed. Steady state performance of the converter system in terms of harmonics and losses will be evaluated using MATLAB and PSCAD/EMTDC simulation. Simulation results show a 37% improvement in total semiconductor loss with better harmonic performance by using the three-level solution compared to the two-level solution with the stated modulation scheme.