Design of polyphase FIR filter using bypass feed direct multiplier

Abstract

Multirate filter are widely used in many DSP application. Many efficient architectures are design to reduce the complexity of DSP system. Adder, Multiplier are the main fundamental blocks of filter which contributes in reduction of area, power and delay parameter of filter. This paper presents polyphase FIR filter using bypass feed direct multiplier and polyphase FIR filter using shift and add multiplier. The proposed polyphase filter is design for filter of length nine. The proposed and conventional design are simulated using Xilinx ISE 13.1 tool. On comparison, proposed design is efficient in terms of area and delay than conventional design.