Hardware of structured brain computer

Abstract

We have proposed a two-level architecture for brain computing, where two levels are introduced for processing of meta-symbol. At Level 1 a conventional pattern recognition is performed, where neural computation is included, and its output gives the meta-symbol which is a symbol enlarged from a symbol to a kind of pattern. At Level 2 an algorithm acquisition is made by using a state machine for abstract states (which is a meta-symbol expression). We are also developing the VLSI chips at each level for the structured brain computer (SBC) version 1.0. To explain SEC we introduce the brain computing and the artificial memory system as well as the hardware of SBC.