Gracefully Degrading Circuit Controllers Based on Polytronics

R. Ruzicka
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引用次数: 11

Abstract

This paper proposes utilisation of polymorphic electronics to design digital circuit controllers that gracefully degrades when some inconvenient situation arise, e.g. when battery goes low or a chip temperature cross some safe level. In proposed approach, the next state logic of the controller is designed using polymorphic gates. Polymorphic gates exhibit two or more logic functions in according to a specific condition (e.g. Vdd level or special signals). This allows to make a smart reconfiguration of the circuit. An algorithm for designing gracefully degrading circuit controllers using polymorphic gates is proposed in the paper. Purpose of the algorithm is demonstrated on an example of a controller. This controller was physically realised and its functionality (especially in transient state) was verified.
基于多电子技术的优雅降级电路控制器
本文提出利用多态电子学来设计数字电路控制器,当出现一些不方便的情况时,例如当电池电量不足或芯片温度超过安全水平时,数字电路控制器可以优雅地降级。在该方法中,控制器的下一状态逻辑采用多态门设计。多态门根据特定条件(如Vdd电平或特殊信号)表现出两个或两个以上的逻辑功能。这允许对电路进行智能重新配置。提出了一种利用多态门设计优雅退化电路控制器的算法。最后以控制器为例说明了该算法的目的。该控制器的物理实现和其功能(特别是在瞬态)进行了验证。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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