{"title":"A Comprehensive Exploration of the Parallel Prefix Adder Tree Space","authors":"Teodor-Dumitru Ene, J. Stine","doi":"10.1109/ICCD53106.2021.00030","DOIUrl":null,"url":null,"abstract":"Parallel prefix tree adders allow for high- performance computation due to their logarithmic delay. Modern literature focuses on a well-known group of adder tree networks, with adder taxonomies unable to adequately describe intermediary structures. Efforts to explore novel structures focus mainly on the hybridization of these widely-studied networks. This paper presents a method of generating any valid adder tree network by using a set of three, simple, point-targeted transforms. This method allows for possibilities such as the generation and classification of any hybrid or novel architecture, or the incremental refinement of pre-existing structures to better meet performance targets. Synthesis implementation results are presented on the SkyWater 90nm technology.","PeriodicalId":154014,"journal":{"name":"2021 IEEE 39th International Conference on Computer Design (ICCD)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE 39th International Conference on Computer Design (ICCD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD53106.2021.00030","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
Parallel prefix tree adders allow for high- performance computation due to their logarithmic delay. Modern literature focuses on a well-known group of adder tree networks, with adder taxonomies unable to adequately describe intermediary structures. Efforts to explore novel structures focus mainly on the hybridization of these widely-studied networks. This paper presents a method of generating any valid adder tree network by using a set of three, simple, point-targeted transforms. This method allows for possibilities such as the generation and classification of any hybrid or novel architecture, or the incremental refinement of pre-existing structures to better meet performance targets. Synthesis implementation results are presented on the SkyWater 90nm technology.