Frequency Domain Reflectometry Based SELT Approach for Loop Topology Estimation

M. Bharathi, S. Ravishankar, Usharani K.R.
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引用次数: 1

Abstract

Network operators need to ascertain loop topology before committing for the performance of a digital subscriber loop. Single Ended Loop Testing (SELT) is generally the most preferred and economical way for estimating the loop topology. In this paper we propose a novel method of loop topology estimation based on discrete multitone line code which reuses most of firmware modules in a typical DSL broadband modem. The loop estimation is done in two phases, the first being frequency domain reflectometry data collection phase and the second being an analysis phase which is done in time and frequency domains. Three types of topologies are considered in this paper for validation: a single line, a network with bridge tap and a cascade of two line sections. The major advantages of this method are, no prior knowledge of the network topology is required, all code is resident in the modem itself and does not need any external bypasses. This method shows good prediction capability for all types of networks up to 20 Kft.
基于频域反射法的环拓扑估计方法
网络运营商在交付数字用户环路性能之前需要确定环路拓扑结构。单端环路测试(SELT)通常是估计环路拓扑结构的最优选和最经济的方法。本文提出了一种基于离散多音线码的环路拓扑估计新方法,该方法重用了典型DSL宽带调制解调器中的大部分固件模块。环路估计分两个阶段完成,第一阶段是频域反射数据采集阶段,第二阶段是时域和频域分析阶段。本文考虑了三种类型的拓扑进行验证:单线,带桥接的网络和两个线段的级联。这种方法的主要优点是,不需要事先了解网络拓扑结构,所有代码都驻留在调制解调器本身,不需要任何外部旁路。该方法对20kft以内的所有类型的网络都具有良好的预测能力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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