{"title":"Effect of circuit board parameters on thermal performance of electronic components in natural convection cooling","authors":"K. Azar, S. S. Pan, J. Parry, H. Rosten","doi":"10.1109/STHERM.1994.288997","DOIUrl":null,"url":null,"abstract":"Natural convection is the most desirable cooling mechanism for electronic enclosures. Limited cooling capacity with natural convection requires identification and optimization of parameters impacting cooling. A set of such parameters is circuit pack layout and board conductivity (circuit board parameters). Hence, experimental and numerical simulations were undertaken to investigate the impact of these parameters on thermal performance of an electronic component in circuit pack setting. Component thermal performance was characterized by its junction to ambient thermal resistance (R/sub ja/), where room ambient was used as the reference temperature. The numerical model was verified against the experimental data with 4 percent agreement between the two analyses. The numerical model was then expanded to include the circuit board parameters. The effects of the spacing and height of the neighboring components, and board conductivity on thermal resistance were investigated. The model consisted of an array of nine components (3/spl times/3), with the center component as the focus of the study. Three values for board conductivity, component spacing and neighboring component height were considered. The data showed that increasing k/sub board/ three folds resulted in 17 percent reduction in R/sub ja/. Similarly, a three fold increase in component spacing reduced the R/sub ja/ by 24 percent. It is deduced that the least junction to ambient thermal resistance was attained when component spacing was 0.023 m (900 mils) and board conductivity was 13.6 W/m/spl deg/K.<<ETX>>","PeriodicalId":107140,"journal":{"name":"Proceedings of 1994 IEEE/CHMT 10th Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1994 IEEE/CHMT 10th Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/STHERM.1994.288997","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
Natural convection is the most desirable cooling mechanism for electronic enclosures. Limited cooling capacity with natural convection requires identification and optimization of parameters impacting cooling. A set of such parameters is circuit pack layout and board conductivity (circuit board parameters). Hence, experimental and numerical simulations were undertaken to investigate the impact of these parameters on thermal performance of an electronic component in circuit pack setting. Component thermal performance was characterized by its junction to ambient thermal resistance (R/sub ja/), where room ambient was used as the reference temperature. The numerical model was verified against the experimental data with 4 percent agreement between the two analyses. The numerical model was then expanded to include the circuit board parameters. The effects of the spacing and height of the neighboring components, and board conductivity on thermal resistance were investigated. The model consisted of an array of nine components (3/spl times/3), with the center component as the focus of the study. Three values for board conductivity, component spacing and neighboring component height were considered. The data showed that increasing k/sub board/ three folds resulted in 17 percent reduction in R/sub ja/. Similarly, a three fold increase in component spacing reduced the R/sub ja/ by 24 percent. It is deduced that the least junction to ambient thermal resistance was attained when component spacing was 0.023 m (900 mils) and board conductivity was 13.6 W/m/spl deg/K.<>