A multi-DSP board for a parallel computer using a packet switched, pipelined bus

Abstract

The design of a multi-DSP board with real-time digital signal processing capabilities, to be used in HECTOR (a multiple-instruction multiple-data parallel computer under development at the University of Toronto), is proposed. Every DSP has access to both local and global onboard memory. Offboard, HECTOR global memory is also accessible. The DSPs share global onboard memory through a single bus with arbitration based on rotating priority. Offboard memory is accessed through the p-bus, a parallel, pipelined, packet-switched, ring-based interconnection network. A/D and D/A converters provide an interface to possible analog inputs. Critical parts of the board have been simulated using THOR, a functional simulator running under the UNIX operating system. Results of the simulation are presented.<>