A Neuromorphic aVLSI network chip with configurable plastic synapses

Abstract

We describe and demonstrate the key features of a neuromorphic, analog VLSI chip (termed F-LANN) hosting 128 integrate-and-fire (IF) neurons with spike-frequency adaptation, and 16 384 plastic bistable synapses implementing a self-regulated form of Hebbian, spike-driven, stochastic plasticity. We were successfully able to test and verify the basic operation of the chip as well as its main new feature, namely the synaptic configurability. This configurability enables us to configure each individual synapse as either excitatory or inhibitory and to receive either recurrent input from an on-chip neuron or AER (address event representation)-based input from an off-chip neuron. It's also possible to set the initial state of each synapse as potentiated or depressed, and the state of each synapse can be read and stored on a computer. The main aim of this chip is to be able to efficiently perform associative learning experiments on a large number of synapses. In the future we would like to connect up multiple F-LANN chips together to be able to perform associative learning of natural stimulus sets.