Diego Perino, Massimo Gallo, R. Laufer, Zied Ben-Houidi, Fabio Pianese
{"title":"A programmable data plane for heterogeneous NFV platforms","authors":"Diego Perino, Massimo Gallo, R. Laufer, Zied Ben-Houidi, Fabio Pianese","doi":"10.1109/INFCOMW.2016.7562049","DOIUrl":null,"url":null,"abstract":"Network function virtualization (NFV) has recently allowed the rapid deployment of network functions. As software implementations become the main option for NFV, performance requirements call for an increased level of hardware support and acceleration. Additionally, the higher demand for flexibility and optimization also requires protocol stack customization at different layers. To fulfill these requirements, we introduce in this paper a programmable data plane (PDP) whose goals are to enable on-the-fly customization of L2-L7 stacks and to integrate both general-purpose CPUs and hardware accelerators. The PDP data plane provides a set of modular elements that the control plane instantiates and orchestrates to compose L2-L7 network functions, allowing a centralized controller to reconfigure heterogeneous network devices and manage state across network functions. We present examples of how PDP data plane modules can be used to realize different functions, such as an information-centric networking (ICN) router and an HTTP reverse proxy. Our preliminary results show that hardware acceleration provides significant benefits at negligible cost, and that careful use of modularity brings a minimal latency penalty, while providing high flexibility and reconfigurability to the network.","PeriodicalId":348177,"journal":{"name":"2016 IEEE Conference on Computer Communications Workshops (INFOCOM WKSHPS)","volume":"97 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Conference on Computer Communications Workshops (INFOCOM WKSHPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INFCOMW.2016.7562049","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 15
Abstract
Network function virtualization (NFV) has recently allowed the rapid deployment of network functions. As software implementations become the main option for NFV, performance requirements call for an increased level of hardware support and acceleration. Additionally, the higher demand for flexibility and optimization also requires protocol stack customization at different layers. To fulfill these requirements, we introduce in this paper a programmable data plane (PDP) whose goals are to enable on-the-fly customization of L2-L7 stacks and to integrate both general-purpose CPUs and hardware accelerators. The PDP data plane provides a set of modular elements that the control plane instantiates and orchestrates to compose L2-L7 network functions, allowing a centralized controller to reconfigure heterogeneous network devices and manage state across network functions. We present examples of how PDP data plane modules can be used to realize different functions, such as an information-centric networking (ICN) router and an HTTP reverse proxy. Our preliminary results show that hardware acceleration provides significant benefits at negligible cost, and that careful use of modularity brings a minimal latency penalty, while providing high flexibility and reconfigurability to the network.