Cell Broadband Engine Processor Design Methodology

O. Takahashi, E. Behnen, S. Cottier, P. Coulman, S. Dhong, B. Flachs, H. P. Hofstee, C. J. Johnson, S. Posluszny
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引用次数: 3

Abstract

The cell BE design methodology is described which enables high frequency, high performance, power efficient, and area optimized design. It includes a hierarchical design style, clean clock boundary, effective use of non-scan latches, at-speed scan testing, custom design like synthesized macro, fine grained clock gating scheme, and cycle accurate power analysis.
蜂窝宽带引擎处理器设计方法
描述了实现高频、高性能、节能和面积优化设计的单元BE设计方法。它包括分层设计风格、干净的时钟边界、有效使用非扫描锁存器、高速扫描测试、定制设计(如合成宏)、细粒度时钟门控方案和周期精确功率分析。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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