An all digital time amplifier with interpolation scheme for low gain variation

Debashis Dhar, Young-Ho Kwak, I. Jung, Chulwoo Kim
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引用次数: 1

Abstract

An all digital time amplifier (TA) is proposed in 0.13 μm CMOS process. The TA is based on quantization scheme; hence it guarantees large input range. An interpolation scheme is employed to achieve more than 2 times reduction in gain variation of the TA over the input range. The all digital TA is portable to other process technology with smaller design effort. The TA shows a gain variation of less than 5% and consumes a power of 14 mW.
一个全数字时间放大器,具有低增益变化的插值方案
提出了一种0.13 μm CMOS工艺的全数字时间放大器(TA)。TA是基于量化方案的;因此,它保证了大的输入范围。在输入范围内,采用了一种插值方案,使TA的增益变化减小2倍以上。全数字TA可移植到其他工艺技术,设计工作量更小。TA的增益变化小于5%,功耗为14mw。
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