Automatic verification of memory systems which service their requests out of order

Abstract

In a shared memory multi-processor environment, one can achieve greater performance by out-of-order servicing of memory requests. Although this results in higher performance, such systems are complicated and their design and programming requires care. Recently, there have been efforts to develop concise formal specifications of such systems. We present a general strategy, based on the language containment paradigm, to automatically verify such memory systems against their formal specifications. The size of the state space explored during the verification is dependent on the number of data values, length of buffers, number of processors, and number of memory locations. Abstraction is used to reduce the number of data values to just two, and the number of memory locations to a small number without losing any accuracy in our verification. As an example, we concentrate on SPARC's V8 memory model, for which we have built a sample hardware description language model. Experimental results demonstrating the feasibility of our approach are presented.