{"title":"A WCDMA variable-gain up-conversion mixer using bias-offset technique","authors":"F. Carrara, G. Palmisano","doi":"10.1109/MELCON.2004.1346798","DOIUrl":null,"url":null,"abstract":"This paper presents the design and simulated performance of a novel variable-gain up-converter based on a bias-offset input transconductor. The proposed topology allows the current reuse and reduces the overall transmitter power consumption in wideband code-division multiple access applications. Temperature compensation and decibel-linear characteristic are achieved by means of a control circuit providing a lower than /spl plusmn/1 dB gain error over a 50-dB dynamic range. A 18-dBm output third order intercept, 11.2-dB noise figure, and -50-dB adjacent-channel leakage power ratio are obtained under maximum gain conditions. Circuit simulations are based on a 0.8-/spl mu/m 46-GHz-f/sub T/ silicon bipolar technology.","PeriodicalId":164818,"journal":{"name":"Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference (IEEE Cat. No.04CH37521)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-05-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference (IEEE Cat. No.04CH37521)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MELCON.2004.1346798","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents the design and simulated performance of a novel variable-gain up-converter based on a bias-offset input transconductor. The proposed topology allows the current reuse and reduces the overall transmitter power consumption in wideband code-division multiple access applications. Temperature compensation and decibel-linear characteristic are achieved by means of a control circuit providing a lower than /spl plusmn/1 dB gain error over a 50-dB dynamic range. A 18-dBm output third order intercept, 11.2-dB noise figure, and -50-dB adjacent-channel leakage power ratio are obtained under maximum gain conditions. Circuit simulations are based on a 0.8-/spl mu/m 46-GHz-f/sub T/ silicon bipolar technology.