Architecture of Via Programmable Logic using Exclusive-OR Array (VPEX) for EB Direct Writing

Akihiro Nakamura, Masahide Kawaharazaki, M. Yoshikawa, T. Fujino
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引用次数: 3

Abstract

In this paper, we propose the novel architecture of VCLD (via configurable logic device) called VPEX (via programmable logic using exclusive-OR array) which is optimized for electron beam (EB) direct writing. The logic element (LE) of VPEX consists of complex gate type exclusive OR (EXOR) and inverter (NOT) gates. The single LE can output 12 logics which include all 2-inputs logic functions (NAND, NOR AND, OR bubble AND, bubble OR XOR XNOR), 3 inputs AOI21 and inverted-output multiplexer (MUXI) by changing via-1 layout. Scan D-FlipFlop can be composed by using 5 LEs. The logic of each LE can be defined by double EB exposure using "character beam". The speed performance of VPEX is much better than that of FPGAs, and 1.5 times worse than that of ASICs. We believe that the combination of VPEX architecture and EB direct writing is the best solution for low-volume production LSIs.
利用异或阵列(VPEX)实现EB直写的可编程逻辑结构
本文提出了一种新的VCLD(通过可配置逻辑器件)架构,称为VPEX(通过使用异或阵列的可编程逻辑),该架构针对电子束(EB)直接写入进行了优化。VPEX的逻辑元件(LE)由复杂门型异或门(EXOR)和反相门(NOT)组成。单个LE可以输出12个逻辑,包括所有2输入逻辑功能(NAND, NOR AND, OR泡AND,泡OR XOR XNOR), 3输入AOI21和通过改变via-1布局的反输出多路复用器(MUXI)。Scan D-FlipFlop可以由5个LEs组成。每个LE的逻辑可以通过使用“特征光束”的双EB曝光来定义。VPEX的速度性能比fpga好很多,比asic差1.5倍。我们相信VPEX架构和EB直写的结合是小批量生产lsi的最佳解决方案。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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