Low-cost stochastic number generator based on MRAM for stochastic computing

Abstract

Stochastic computing (SC) can transform the major operations of neural network, i.e. multiply-and-accumulate (MAC), into AND and multiplexer, which drastically reduce the hardware occupation and energy consumption. This paper proposes a novel design of SC for highly energy-efficient computing which combines the features of low power and stochastic switching of magnetic random access memory (MRAM) and the intrinsic fault-tolerance and simple arithmetic operations of SC. A simplified circuit of stochastic number generater (SNG) based on MRAM device is proposed to transform the binary bitstream into stochastic bitstream. Compared with the conventional SNGs, the proposed SNG reduces considerably the design complexity and saves the energy consumption in consequence. Furthermore, the performance is investigated in terms of accuracy and hardware occupation to explore the design space.