Leveraging 3D technologies for hardware security: Opportunities and challenges

P. Gu, Shuangchen Li, Dylan C. Stow, Russell Barnes, L. Liu, Yuan Xie, E. Kursun
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引用次数: 34

Abstract

3D die stacking and 2.5D interposer design are promising technologies to improve integration density, performance and cost. Current approaches face serious issues in dealing with emerging security challenges such as side channel attacks, hardware trojans, secure IC manufacturing and IP piracy. By utilizing intrinsic characteristics of 2.5D and 3D technologies, we propose novel opportunities in designing secure systems. We present: (i) a 3D architecture for shielding side-channel information; (ii) split fabrication using active interposers; (iii) circuit camouflage on monolithic 3D IC, and (iv) 3D IC-based security processing-in-memory (PIM). Advantages and challenges of these designs are discussed, showing that the new designs can improve existing counter-measures against security threats and further provide new security features.
利用3D技术实现硬件安全:机遇与挑战
3D芯片堆叠和2.5D中间层设计是提高集成密度、性能和成本的有前途的技术。目前的方法在处理诸如侧信道攻击、硬件木马、安全IC制造和IP盗版等新兴安全挑战方面面临严重问题。通过利用2.5D和3D技术的固有特性,我们提出了设计安全系统的新机会。我们提出:(i)屏蔽侧信道信息的3D架构;(ii)使用有源中间体的分裂制造;(iii)单片3D IC上的电路伪装,以及(iv)基于3D IC的内存安全处理(PIM)。讨论了这些设计的优点和挑战,表明新设计可以改进现有的安全威胁对抗措施,并进一步提供新的安全功能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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