Noise immunity modeling and analysis of delay-locked loop

Abstract

Delay-locked loops (DLLs) have emerged an attractive alternative to the traditional phase-locked loops (PLLs). It is essential to understand and analyze the electromagnetic susceptibility of DLLs to ensure the proper operation of the system. In order to ascertain how the performance of DLL is affected by the external noise, we design a DLL using self-biased techniques and establish the noise immunity experiment with bulk current injection (BCI) method. We also construct the equivalent circuit model for circuit simulation and demonstrate its validity by comparing with the measurement results. Consequently, the RF noise immunity characteristics of the DLL varies with its frequency and magnitude. Particularly, we detect that the DLL circuit that we designed is very sensitive to the external noise with frequency around 75 MHz.