FPGA implementation of the synchronization for IEEE 802.11n WLAN systems

M. Nguyen, Viet-Tan Nguyen, T. Nguyen, Xuan-Nghia Nguyen, Vu-Thang Nguyen, Vu-Duc Ngo
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Abstract

Normally, a premable is used for the time synchronization for IEEE 802.11n Wireless LAN (WLAN) systems. However, the synchronization is often affected by the timing of the packet detection and automatic gain control completion (AGC). Therefore, it is invalid to assume that symbol timing synchronization starts at the beginning of the preambles in conventional methods. Moreover, most current timing synchronization methods estimate a coarse time-offset of legacy short training symbols (L-STSs) using complex mathematical expressions such as the cross-correlation or auto-correlation. Implementations of these methods, therefore, are complicated and require a lot of hardware. In order to solve the above problems, an effective symbol timing synchronization method is proposed. The new method can detect the start of frame correctly and can save hardware upto 90.5%, 70.6% and 72.4% compare to conventional and previously proposed methods.
FPGA实现的用于IEEE 802.11n WLAN系统的同步
通常情况下,IEEE 802.11n无线局域网(WLAN)系统使用premable进行时间同步。然而,同步常常受到数据包检测和自动增益控制完成(AGC)的时间的影响。因此,在传统方法中,假设符号时序同步从序文开始是无效的。此外,大多数当前的定时同步方法使用复杂的数学表达式(如互相关或自相关)来估计遗留短训练符号(l - sts)的粗时间偏移。因此,这些方法的实现是复杂的,并且需要大量的硬件。为了解决上述问题,提出了一种有效的符号定时同步方法。新方法能够正确检测帧的开始,与传统方法和先前提出的方法相比,可分别节省90.5%、70.6%和72.4%的硬件资源。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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