RAPTOR: a single chip multiprocessor

Sang-Won Lee, Y. Song, Soo-Won Kim, H. Oh, Woo-Jang Hahn
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引用次数: 12

Abstract

A microarchitecture of a processor named RAPTOR is described. RAPTOR is a single chip multiprocessor developed for exploiting thread-level parallelism. RAPTOR includes four identical processors, a graphics coprocessor, and an external cache controller. Each processor has a 16 KB primary cache and implements SPARC version 9 instruction set architecture. The external cache controller provides direct connection to a large external second level cache. RAPTOR is designed as a building block of multiprocessor systems such as symmetric multiprocessor machines.
RAPTOR:单芯片多处理器
描述了RAPTOR处理器的微体系结构。RAPTOR是为开发线程级并行性而开发的单芯片多处理器。RAPTOR包括四个相同的处理器,一个图形协处理器和一个外部缓存控制器。每个处理器有一个16 KB的主缓存,并实现SPARC版本9指令集体系结构。外部缓存控制器提供与大型外部二级缓存的直接连接。RAPTOR被设计为多处理器系统(如对称多处理器机器)的构建块。
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