A 9MHz filtering ADC with additional 2nd-order ΔΣ modulator noise suppression

Abstract

This paper presents a filtering ADC for the LTE standard, where a Delta-Sigma modulator (DSM) is merged into the channel-select filter (CSF) of the LTE radio receiver. The CSF introduces an additional 2nd-order suppression of both quantization and thermal DSM noise, while the CSF transfer function is essentially maintained. The 65 nm CMOS prototype is clocked at 288MHz with a 9MHz LTE bandwidth, and has an input-referred noise of 8.1 nV/√Hz, 12 dB gain, and an in/out-of-band IIP3 of 11.5/27 dBVrms, with a power consumption of 11.3mW, resulting in state-of-the-art figure-of-merits (FOMs) for filtering ADCs.