ΔΣ ADC Design Considerations for WiFi/WiMAX Receivers

Abstract

Modern multi-standard receivers in deep-submicron technologies pose significant design challenges on the analog baseband. Moving this analog filtering to the digital domain simplifies the design, yielding a process-scalable implementation. However, analog-to-digital converter (ADC) specifications now become more stringent and must be obtained by comprehending the standard and the system. Assuming a receiver NF of 5.96dB and SNR degradation of 0.36dB by the ADC, the proposed dual-mode WiFi/WiMAX receiver attains an input sensitivity of -74dBm (20MHz channel bandwidth). To accommodate the high dynamic range and the anti-alias rejection needed for the system, a Delta-Sigma (ΔΣ) ADC is proposed. Single-loop and Multi-Stage Noise-Shaping (MASH) architectures that achieve a SNR of 69dB at a low oversampling ratio (OSR) of 8 for a conversion bandwidth of 40MHz (108Mbps, OFDM) are investigated. Based on the important insights from this analysis on thermal noise, harmonic distortion, and power tradeoffs, an optimal ΔΣ ADC design is proposed.