High sampling rate 1 GS/s current mode pipeline ADC in 90 nm Si-CMOS process

S. Tanifuji, K. Ando, T. Ta, S. Kameda, N. Suematsu, T. Takagi, K. Tsubouchi
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引用次数: 2

Abstract

We verifid possibility of high sampling rate and lower power consumption current mode ADC that focused on the most high-speed operation for millimeter-wave broad-band wireless terminal such as wireless personal area network (WPAN). A 5 bit 1 giga-samples-per-second (GS/s) current mode pipeline ADC has been designed and fabricated in 90 nm Si complementary metal oxide semiconductor (CMOS) process. The fabricated ADC has no miscode and increases monotonically. In addition, differential non linearity (DNL) is less than 1.0 and integral non linearity (INL) is less than 1.25, power consumption is 52.8mW on 1 GS/s.
高采样率1 GS/s的90 nm Si-CMOS工艺电流模式流水线ADC
我们验证了高采样率和低功耗电流模式ADC的可能性,这些ADC专注于毫米波宽带无线终端(如无线个人区域网络(WPAN))的最高速运行。采用90nm硅互补金属氧化物半导体(CMOS)工艺,设计并制作了一个5位1gb /s电流模式流水线ADC。所制备的ADC无误码,且呈单调递增。差分非线性(DNL)小于1.0,积分非线性(INL)小于1.25,1gs /s时的功耗为52.8mW。
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