{"title":"Exploring Functional Unit Design Space of VLIW Processors for Optimizing Both Performance and Energy Consumption","authors":"Abhishek Pillai, Wei Zhang, L. Yang","doi":"10.1109/AINAW.2007.179","DOIUrl":null,"url":null,"abstract":"The number of functional units can have significant impact on both the performance and energy consumption of VLIW processors. This paper uses a design exploration approach to find optimal integer functional unit configurations for achieving the best EDP (energy delay product) results for different media applications. Our experimental results quantitatively indicate that the optimal number of integer functional units should match the instruction level parallelism that can be extracted from the applications to balance both performance and energy optimally for VLIW processors.","PeriodicalId":338799,"journal":{"name":"21st International Conference on Advanced Information Networking and Applications Workshops (AINAW'07)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"21st International Conference on Advanced Information Networking and Applications Workshops (AINAW'07)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/AINAW.2007.179","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The number of functional units can have significant impact on both the performance and energy consumption of VLIW processors. This paper uses a design exploration approach to find optimal integer functional unit configurations for achieving the best EDP (energy delay product) results for different media applications. Our experimental results quantitatively indicate that the optimal number of integer functional units should match the instruction level parallelism that can be extracted from the applications to balance both performance and energy optimally for VLIW processors.