{"title":"New Symmetric Extendable Type Multilevel Inverter Topology With Reduced Switch Count","authors":"V. Thiyagarajan","doi":"10.1109/ICEES.2019.8719287","DOIUrl":null,"url":null,"abstract":"This paper proposes a new symmetric extendable type multilevel inverter topology suitable for medium and high voltage applications. The proposed inverter can produce output levels with a lower number of power switches. The main feature of the proposed inverter is the inbuilt creation of negative voltages without any supplementary circuit. Another advantage include the lower number of conducting switches which reduces the switching losses. Comparison study is presented between the proposed inverter and other recently presented topologies. Simulation results for 7 -level and 11 - level inverter operation are presented to show the performance of the proposed inverter topology.","PeriodicalId":421791,"journal":{"name":"2019 Fifth International Conference on Electrical Energy Systems (ICEES)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 Fifth International Conference on Electrical Energy Systems (ICEES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEES.2019.8719287","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper proposes a new symmetric extendable type multilevel inverter topology suitable for medium and high voltage applications. The proposed inverter can produce output levels with a lower number of power switches. The main feature of the proposed inverter is the inbuilt creation of negative voltages without any supplementary circuit. Another advantage include the lower number of conducting switches which reduces the switching losses. Comparison study is presented between the proposed inverter and other recently presented topologies. Simulation results for 7 -level and 11 - level inverter operation are presented to show the performance of the proposed inverter topology.