Design and Implementation of Deep Learning Core for FPGA Platform

Jin-Chuan See, Jing-Jing Chang, Hui-Fuang Ng, K. Mok, Wai-Kong Lee
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Abstract

As Internet of Things (IoT) continues to advance, the gap between IoT and Artificial Intelligence (AI) is getting smaller. IoT sensor node with "smart" capability has become a highly demanded infrastructure to realize Industrial 4.0. Typically, deep learning algorithms are implemented in Graphic Processing Unit (GPU) for high performance. But when it comes to adoption in IoT environment, integrating sensor node with a GPU may pose a major challenge due to high energy consumption. This paper discusses the basic idea on how to implement a deep learning core, specifically for Convolutional Neural Network (CNN) onto the Field Programmable Gate Array (FPGA). Optimization was proposed to reduce number of multiplications needed to address memory contents, hence reducing Digital Signal Processing (DSP) unit synthesized. Synthesis result shows a relatively low hardware area with reasonable performance on both Artix-7 and Virtex-7 FPGA.
随着物联网(IoT)的不断发展,物联网与人工智能(AI)之间的差距越来越小。具有“智能”能力的物联网传感器节点已成为实现工业4.0的高要求基础设施。通常,深度学习算法是在图形处理单元(GPU)中实现的,以获得高性能。但当涉及到物联网环境的采用时,由于高能耗,将传感器节点与GPU集成可能会带来重大挑战。为了减少寻址内存内容所需的乘法次数,从而减少了数字信号处理(DSP)单元的合成。综合结果表明,在Artix-7和Virtex-7 FPGA上,硬件面积相对较小,性能合理。
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