The design of random-testable sequential circuits

H. Wunderlich
{"title":"The design of random-testable sequential circuits","authors":"H. Wunderlich","doi":"10.1109/FTCS.1989.105552","DOIUrl":null,"url":null,"abstract":"A method is described for selecting a minimal set of directly accessible flip-flops. Since this problem turns out to be NP-complete, suboptimal solutions can be derived using some heuristics. An algorithm is presented to compute the corresponding weights of the patterns, which are time-dependent in some cases. The entire approach is validated with the help of examples. Only 10-40% of the flip-flops have to be integrated into a partial scan path or into a built-in self-test register to obtain nearly complete fault coverage by weighted random patterns.<<ETX>>","PeriodicalId":230363,"journal":{"name":"[1989] The Nineteenth International Symposium on Fault-Tolerant Computing. Digest of Papers","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"38","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1989] The Nineteenth International Symposium on Fault-Tolerant Computing. Digest of Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FTCS.1989.105552","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 38

Abstract

A method is described for selecting a minimal set of directly accessible flip-flops. Since this problem turns out to be NP-complete, suboptimal solutions can be derived using some heuristics. An algorithm is presented to compute the corresponding weights of the patterns, which are time-dependent in some cases. The entire approach is validated with the help of examples. Only 10-40% of the flip-flops have to be integrated into a partial scan path or into a built-in self-test register to obtain nearly complete fault coverage by weighted random patterns.<>
随机可测试顺序电路的设计
描述了一种用于选择直接可访问的人字拖的最小集合的方法。由于这个问题是np完全的,所以可以使用一些启发式方法推导出次优解。提出了一种算法来计算模式的相应权值,在某些情况下,模式是时变的。通过实例对整个方法进行了验证。只需将10-40%的触发器集成到部分扫描路径或内置自检寄存器中,就可以通过加权随机模式获得几乎完全的故障覆盖
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信