Optimal Memory Address Seeds for Pattern Sensitive Faults Detection

Abstract

The goal of this paper is to propose a new technique for memory testing based on transparent memory march tests (van de Goor, 1991 and Nicolaidis, 1996). This paper deals with memory pattern sensitive faults detection problem. It shows the efficiency of multiple runs of march tests for memory passive pattern sensitive faults detection and analyzes the optimal address seeds for multiple march test runs. This paper provides only short fragment of carried researches. All results can be found in extended version of this paper