Kim Tuyen Trinh, Chia-Han Lin, H. Kao, H. Chiu, N. Karmakar
{"title":"Design of Two-Gain-Level Amplifier for $Ka$-Band Phase Shifters Using 0.15 μm GaAs pHEMT Process","authors":"Kim Tuyen Trinh, Chia-Han Lin, H. Kao, H. Chiu, N. Karmakar","doi":"10.1109/AMS48904.2020.9059455","DOIUrl":null,"url":null,"abstract":"A two-gain-level GaAs pHEMT amplifier adopting Cascode and common source topologies, operating at 37 GHz for radiometer active phase shifters was designed. The EM simulated results show that the developed amplifier achieves a maximum gain of 19.4 dB and gain difference of 7.6 dB. The typical noise figures of 6 dB and 7.2 dB in high and low gain states respectively within 1 GHz bandwidth. DC power consumption is about 217 mW. Within the bandwidth of interest, the gain flatness is about ± 0.5 dB; the input and output return losses are larger 9 dB at 37 GHz for both gain stages. Gain levels are obtained by changing the gate voltage in the Cascode stage. The MMIC chip is fabricated by using 0.15 μm GaAs pHEMT Process. The total core area of the chip with all the pads is 1.5 mm × 1 mm.","PeriodicalId":257699,"journal":{"name":"2020 4th Australian Microwave Symposium (AMS)","volume":"228 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 4th Australian Microwave Symposium (AMS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/AMS48904.2020.9059455","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A two-gain-level GaAs pHEMT amplifier adopting Cascode and common source topologies, operating at 37 GHz for radiometer active phase shifters was designed. The EM simulated results show that the developed amplifier achieves a maximum gain of 19.4 dB and gain difference of 7.6 dB. The typical noise figures of 6 dB and 7.2 dB in high and low gain states respectively within 1 GHz bandwidth. DC power consumption is about 217 mW. Within the bandwidth of interest, the gain flatness is about ± 0.5 dB; the input and output return losses are larger 9 dB at 37 GHz for both gain stages. Gain levels are obtained by changing the gate voltage in the Cascode stage. The MMIC chip is fabricated by using 0.15 μm GaAs pHEMT Process. The total core area of the chip with all the pads is 1.5 mm × 1 mm.