Toward Systematic Construction of Timing Diagrams from UML/MARTE Behavioral Models for Time-Triggered Embedded Software

Abstract

The UML has been used to describe structures and behaviors of time-triggered embedded software. Analysis of timing constraints is an important issue in developing time-triggered embedded software. Among multiple types of UML diagrams, timing diagrams are appropriate to show state changes and their relevant events of objects over time with timing constraints. However, there has been little study on how to specify and utilize timing diagrams in practice. Given sequence diagrams and state machine diagrams with MARTE annotations, we propose a systematic way to construct timing diagrams with MARTE annotations. To get well-formed models, we check timing constraints and consistency of the input UML/MARTE models. We present checking criteria for well-formed UML/MARTE models and systematic transformation rules. To show effectiveness of our approach, we demonstrate an illustrative example of GCU (Guidance and Control Unit) software used in avionics systems.