10-transistor 1-bit adders for n-bit parallel adders

Abstract

Two designs of 10-transistor 1-bit adder are described in this paper. The output voltages levels of these 1-bit adders have a maximum of one threshold voltage (V/sub T/) loss. This is an important property since previously described 10-transistor designs suffer from two-threshold voltage loss. This also allows the successful use of these designs in a 4-bit ripple carry adder (RCA) and a 12-bit carry select adder (CSA). This is the first time where both the 4-bit and the 12-bit adders operate properly while using a 10-transistors 1-bit adder. All these circuits are implemented and simulated in 0.18 /spl mu/m CMOS technology using Cadence development tools. The average power dissipation and maximum time delay have been recorded.