Network processor — A simplified approach for transport layer offloading on NIC

Abstract

High performance Network Interconnect is the most important component in High Performance Computing systems. The Network Interconnect mainly consists of three components: Network Interface Card, Switch fabric, and Light weight protocol stack. In order to achieve high bandwidth and low latency, transport protocol is offloaded to Network Interface Card. In transport offload model, the Network Interface Card is not only involved in data transfer but also involved in protocol processing. Protocol processing is a very complex task that involves multiple variables and intricate functionality. Therefore, it would be very beneficial if the Network Interface Card can provide enough flexibility to support multiple protocols. Enhancing support for multiple functionalities will empower the Network Interface Card to support multiple applications. Traditionally, the fixed custom logic in FPGA or ASIC was used for protocol processing. But, it is very difficult to achieve flexibility in the fixed custom logic. To overcome this issue, Network Processor, which provides a lot of flexibility, has emerged as an alternative for conventional hardwired logic. In this paper, we present a novel architecture that makes use of a RISC processor as the Network processor for high-speed network interfaces. We focus on the use of Network Processor in protocol processing. We also share how useful Network Processor is for supporting additional features, even after the complete NIC architecture was finalized. We also explain the debugging strategy, which is very helpful for debugging complex protocol processing.