An ECG Processor for the Detection of Eight Cardiac Arrhythmias with Minimum False Alarms

Abstract

An Electrocardiography (ECG) based processor for eight Cardiac arrhythmias (CA) detection with smart priority logic is presented to minimize the false alarms. The processor utilizes a Multi-Level Linear Support Vector Machine (ML-LSVM) classifiers with one-vs-all approach to distinguish the different CAs. The classification is solely based on 5 features including R-wave, S-wave, T-wave, R-R interval and Q-S interval. The processor employs a priority logic to prioritize the detected conditions if more than one condition are detected. The system is implemented using CMOS 180nm with an area of 0.18mm2 and validated using 83 patient’s recordings from Physionet Arrhythmia Database and Creighton University Database. The proposed processor consumes 0.91uW with an average classification accuracy of 98.5% while reducing the false alarms by 99%, which is 30% superior performance compared to conventional systems.