A frequency agile terminal receiver for wireless multi-standard applications

L. Maurer, G. Hueber, T. Dellsperger, T. Burger, M. Huemer, R. Weigel
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引用次数: 7

Abstract

This paper presents a flexible multi-standard receiver architecture that extends the well known direct conversion receiver (DCR). With high dynamic-range/low-power sigma-delta analog-to-digital converters (ADC) and digital signal processing functions locally on the radio frequency integrated circuit (RFIC) a receiver with relaxed requirements for the analog part and a flexible bandwidth channel filtering in digital domain can be realized. Furthermore, the architecture introduces a digital interface between RF and digital baseband IC. Since analog building blocks have limited reconfiguration capabilities by nature of their implementation, the extension of the conventional analog signal processing blocks by a digital front-end (DFE) greatly enhances the flexibility of the RFIC. Measurements of a prototype implementation of the proposed receiver architecture are presented
用于无线多标准应用的频率敏捷终端接收机
本文提出了一种灵活的多标准接收机体系结构,对直接转换接收机(DCR)进行了扩展。通过在射频集成电路(RFIC)上局部配置高动态范围/低功耗σ - δ模数转换器(ADC)和数字信号处理功能,可以实现对模拟部分要求较低的接收机和数字域灵活带宽的信道滤波。此外,该体系结构在RF和数字基带IC之间引入了数字接口。由于模拟构建块的实现性质限制了其重新配置能力,因此通过数字前端(DFE)扩展传统模拟信号处理块大大增强了RFIC的灵活性。给出了所提出的接收机架构的原型实现的测量结果
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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