D-RECS: A complete methodology to implement Self Dynamic Reconfigurable FPGA-based systems

F. Cancare, C. Pilato, Andrea Cazzaniga, D. Sciuto, M. Santambrogio
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引用次数: 3

Abstract

Dynamic self reconfigurable embedded systems are gathering, day after day, an increasing interest from both the scientific and the industrial world. At the same time, however, the need of a comprehensive and easy to use tool which can guide designers through the whole implementation process is becoming stronger. Up to now every proposed methodology for implementing dynamic self reconfigurable systems is architecture-centered. In most cases the system development process is time consuming and requires a very specific technical background. Aim of this work is to provide a fast brain to bit design flow whose goal is to simplify the dynamic reconfigurable system development process by shifting the designer focus from the architecture point of view to the application point of view: designers will not need to possess Dynamic Reconfigurability expertise but just to be skilled with the application domain.
D-RECS:实现基于fpga的自动态可重构系统的完整方法
动态的自重构嵌入式系统日益受到科学界和工业界的关注。然而,与此同时,对一个全面且易于使用的工具来指导设计师完成整个实施过程的需求也越来越强烈。目前提出的实现动态自重构系统的方法都是以体系结构为中心的。在大多数情况下,系统开发过程是耗时的,并且需要非常具体的技术背景。这项工作的目的是提供一个快速的从大脑到比特的设计流程,其目标是通过将设计人员的重点从体系结构的角度转移到应用程序的角度来简化动态可重构系统的开发过程:设计人员不需要拥有动态可重构性的专业知识,只需要熟练掌握应用程序领域。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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