T. Grynchyshyn, V. Hryha, A. Voronych, Mykhaylo Ilko
{"title":"Special Processors Simulation for Forming and Digital Processing of Error-Correcting Codes in Computer Systems","authors":"T. Grynchyshyn, V. Hryha, A. Voronych, Mykhaylo Ilko","doi":"10.1109/TCSET49122.2020.235444","DOIUrl":null,"url":null,"abstract":"The methods of digital and pulse signal modulation in modern computer systems of data transmission are analysed. Process of forming non-redundant coding that use the errors detection and correction in the Galois basis are offered. Structures of special processors for forming signal correcting codes are built. Working algorithms for proposed coding methods are developed and their software implementation are offered. Circuit design of Galois code sequence generator is implemented. Work simulation and synthesis on FPGA of Xilinx are performed.","PeriodicalId":389689,"journal":{"name":"2020 IEEE 15th International Conference on Advanced Trends in Radioelectronics, Telecommunications and Computer Engineering (TCSET)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 15th International Conference on Advanced Trends in Radioelectronics, Telecommunications and Computer Engineering (TCSET)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TCSET49122.2020.235444","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The methods of digital and pulse signal modulation in modern computer systems of data transmission are analysed. Process of forming non-redundant coding that use the errors detection and correction in the Galois basis are offered. Structures of special processors for forming signal correcting codes are built. Working algorithms for proposed coding methods are developed and their software implementation are offered. Circuit design of Galois code sequence generator is implemented. Work simulation and synthesis on FPGA of Xilinx are performed.