Experimental Study for Gate Trap and Generation Current using DCIV Method

Young Kwon Kim, D. B. Lee, Won Hyeok Choi, Taesik Park, Myoung Jin Lee
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Abstract

The newly proposed analysis method using a direct-current current-voltage (DCIV) simulation is introduced for investigating leakage current composing MOS transistor. From comparing the density and location of traps using DCIV method and investigating the leakage current of gate channel transistor, we proposed the graphical analysis method to correlate the DCIV current and leakage mechanism by the traps. And, our graphical method intuitively explains that leakage current in MOS transistor is well correlated with the DCIV current of the MOS transistor arrays due to two kinds of traps created by Fowler-Nordheim (F-N) stress and Hot carrier stress, respectively.
DCIV法栅极陷阱及产生电流的实验研究
介绍了一种利用直流电压(DCIV)仿真分析MOS晶体管漏电流的新方法。通过对DCIV法陷阱密度和位置的比较,以及对栅极沟道晶体管漏电流的研究,提出了通过陷阱将DCIV电流与漏电流机理联系起来的图解分析方法。并且,我们的图解方法直观地解释了由于Fowler-Nordheim (F-N)应力和热载流子应力分别产生的两种陷阱,MOS晶体管中的泄漏电流与MOS晶体管阵列的DCIV电流具有良好的相关性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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