Software solutions for the Viterbi algorithm

M. Ikekawa, I. Kuroda
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引用次数: 0

Abstract

Efficient software implementations of the Viterbi algorithm on two new generation processors, /spl mu/PD7701x and V830 are discussed. /spl mu/PD7701x is a 16-bit fixed point general purpose DSP which includes eight 40-bit general purpose registers, highly parallel operation capability, and conditional execution capability. V830 is a 32-bit RISC processor which has a multiply-accumulator and other special instructions for multimedia signal processing. These features enable effective implementations on both processors. The Viterbi decoders for rate 1/2 convolutional code are implemented on these processors and are two times faster than on conventional type DSPs.
维特比算法的软件解决方案
讨论了Viterbi算法在新一代处理器/spl mu/PD7701x和V830上的高效软件实现。/spl mu/PD7701x是一款16位定点通用DSP,包含8个40位通用寄存器,具有高度并行运算能力和条件执行能力。V830是一个32位的RISC处理器,具有乘法累加器和其他用于多媒体信号处理的特殊指令。这些特性支持在两个处理器上有效实现。速率1/2卷积码的维特比解码器在这些处理器上实现,比传统类型的dsp快两倍。
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