Family-based model checking of fMultiLTL properties

Abstract

We introduce a new logic for expressing multi-properties of system families (Software Product Lines - SPLs). While the standard LTL logic refers only to a single trace at a time, fMultiLTL logic proposed here refers to multiple traces originating from different sets of variants of the SPL. This is achieved by allowing so-called featured quantification over traces, ∀ψ and ∃ψ, where the feature expression ψ describes a set of variants (sub-family) the quantified trace comes from. A specialized family-based model checking algorithm for verifying some fragments of fMultiLTL is given. A prototype family-based model checker, called Dądalux, has been implemented. We illustrate the practicality of this approach on several interesting SPL models.