Experience extending VLSI design with mathematical logic

Abstract

The growing demands for assurance of properties like correctness, safety, and security have led to the development of design methods using mathematical logic. These methods have broad application to hardware, software, and system design. Design based on mathematical logic offers the capability to relate structural descriptions with behavioral descriptions and properties. The challenge is to move these methods into mainstream engineering. This requires teaching mathematical logic in engineering courses which are directly applicable to engineering design. This paper describes how formal logic is included in the computer engineering curriculum at Syracuse University, our experience teaching formal logic to engineers, and how VLSI circuits have been fabricated by students using a formal development process.