Tri-level high capacitive load clock driver design for charge coupled devices

Abstract

The drive requirements for most of the advanced linear and TDI [Time delay integration] detector is becoming critical with respect to voltage levels and capacitive load driving. These detectors require tri-level bipolar clocks for driving capacitive loads of the order of~7200 pF with fast rise/fall time of the order of ~350ns to improve the charge transfer efficiency. No off the shelf space qualified tri-level bipolar clock drivers are available to meet these stringent requirements. This calls for the design of new customized clock driver electronics. Hence discrete transistor based in-house design is carried out to cater to the tri-level bipolar clock driving requirements of detectors. This paper discusses the design details, simulation and characterization results and temperature variation results for the same.