A New Algorithm to Exploit Superword Level Parallelism

Abstract

Nowadays SIMD extensions became ubiquitous for computational platform, being widely used in signal processing, multimedia, and scientific applications. However, compilers still have difficult in vectorizing some applications, such as computations on non-contiguous and especially interleaved data, and loop nest for which inner loops that carry all the dependencies and external loops with strided memory accesses. In order to solve these problems, we adopt Isomorphic Statements Grouping (ISG) after extending group following UD and DU chains, which group isomorphic computation statements that perform the same operation. And correspondingly, we generate vector permutation instructions according to the target ISA SIMD instructions at the SIMD code generation phase. This approach has been implemented in a compiler based on Open64 which translate C source program to C source program with SIMD intrinsic functions. Experiments with this compiler show that ISG Super Level Parallelism(ISG-SLP) can be used to compile a number of real-world kernels, achieving up to 3.11 speedup.