Logic controller design system supporting UML activity diagrams

Abstract

The paper introduces a logic controller design system, called PNAD, supporting UML activity diagrams in version 2.x as a semi-formal specification technique. The system enables transformation of activity diagrams into control Petri nets, their formal verification using model checking technique and the nuXmv tool, generation of synthesizable code in hardware description language VHDL and generation of C code for microcontrollers. The benefits include the support for discrete event system development since the specification till prototype implementation. Additionally, reverse transformation from control Petri nets into UML activity diagrams is also possible. The internal representation of diagrams is based on XML files. The usage of proposed system is illustrated on an example of concrete production process.