A 60–64 GHz Power Amplifier for MM-Wave Radar Transceiver with 16.51-dBm Power and 23.34% PAE in 40-NM CMOS

Abstract

A 60–64 GHz high-efficiency CMOS power amplifier (PA) based on a magnetically coupled resonator (MCR) matching network is presented. A design rule for the MCR matching network is proposed, which greatly increases the efficiency and saturated output power. With lower power devices, a two-stage differential PA with neutralized common-source stages has been realized in a 40-nm bulk CMOS process. Simulated in 40-nm CMOS, 23.34% peak power added efficiency (PAE), 16.51-dBm saturated output power $(P_{\text{sat}})$, 15.81-dB power gain, and 12.54- dBm output 1-dB compression point $(P_{1\text{dB}})$ with 11.18% PAE are achieved by the proposed P A chip at 60 GHz. The $P_{\text{sat}}$ is above 16.2-dBm, the $\mathrm{P}_{1\text{dB}}$ is above 11.6-dBm and the peak PAE is above 20% across the 60–64 GHz frequency range.