A new processor architecture for digital signal transport systems

Minoru Inamori, K. Ishii, A. Tsutsui, K. Shirakawa, H. Nakada, T. Miyazaki
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引用次数: 2

Abstract

This paper proposes a new processor architecture for manipulating protocols in digital signal transport systems. To realize flexible and high-performance digital signal transport systems, the architecture has unique application-specific hardware with a core CPU. It is derived from an analysis of functions in real systems. A computer simulation confirms the efficiency of the architecture.
一种新的数字信号传输系统处理器体系结构
本文提出了一种用于数字信号传输系统协议处理的新型处理器体系结构。为了实现灵活和高性能的数字信号传输系统,该架构具有独特的专用硬件和核心CPU。它来源于对实际系统中函数的分析。计算机仿真验证了该体系结构的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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