Common mode voltage reduction method modifying the distribution of zero voltage vector in PWM converter/inverter system

Abstract

This paper proposes a new space-vector pulsewidth modulation strategy that can restrict the common mode voltage within one-third of the DC bus voltage in a PWM converter/inverter system with the synchronization of the switching sequence. In this paper, the generation of the common mode voltage pulse whose magnitude reaches two-thirds of DC bus voltage is investigated and elimination of this voltage pulse is presented. The proposed method can be easily implemented in software and requires no extra hardware without degradation in control performance of PWM converter/inverter fed AC motor drives.