A 94.6dB-SNDR 50kHz-BW 1-1-1 MASH ADC Using OTA-FIA Based Integrators

Abstract

This paper presents a novel two-stage amplifier, which cascades a duty-cycled inverter-based OTA and a floating-inverter amplifier (FIA). The proposed OTA-FIA can achieve 72.0dB gain under a 1.2V supply, whose output swing is 420mV. Additionally, it exhibits intrinsic loop stability without compensation and reduces thermal noise during integration. The proposed OTA-FIA is adopted in a low distortion 1-1-1 MASH structure to obtain high resolution. Simulated in a 55 nm CMOS process, the proposed ADC can achieve an SNDR of 94.6dB with a bandwidth of 50kHz. It consumes $363.8\mu \mathrm{W}$ from a 1.2V supply at a 5MS/s sampling frequency, resulting in a 176.0dB SNDR-based Schreier FoM.