On-Chip Randomization for Memory Protection Against Hardware Supply Chain Attacks to DRAM

Brett Meadows, Nathan J. Edwards, Sang-Yoon Chang
{"title":"On-Chip Randomization for Memory Protection Against Hardware Supply Chain Attacks to DRAM","authors":"Brett Meadows, Nathan J. Edwards, Sang-Yoon Chang","doi":"10.1109/SPW50608.2020.00044","DOIUrl":null,"url":null,"abstract":"Dynamic Random Access Memory (DRAM) is widely used for data storage and, when a computer system is in operation, the DRAM can contain sensitive information such as passwords and cryptographic keys. Therefore, the DRAM is a prime target for hardware-based cryptanalytic attacks. These attacks can be performed in the supply chain to capture default key mechanisms enabling a later cyber attack or predisposition the system to remote effects. Two prominent attack classes against memory are the Cold Boot attack which recovers the data from the DRAM even after a supposed power-down and Rowhammer attack which violates memory integrity by influencing the stored bits to flip. In this paper, we propose an on-chip technique that obfuscates the memory addresses and data and provides a fast detect-response to defend against these hardware-based security attacks on DRAM. We advance the prior hardware security research by making two contributions. First, the key material is detected and erased before the Cold Boot attacker can extract the memory data. Second, our solution is on-chip and does not require nor depend on additional hardware or software which are open to additional supply chain attack vectors. We analyze the efficacy of our scheme through circuit simulation and compare the results to the previous mitigation approaches based on DRAM write operations. Our simulation and analysis results show that purging key information used for address and data randomization can be achieved much faster and with lower power than with typical DRAM write techniques used for sanitizing memory content. We demonstrate through circuit simulation of the key register design a technique that clears key information within 2.4ns which is faster by more than two orders magnitude compared to typical DRAM write operations for 180nm technology, and with a power consumption of 0.15 picoWatts.","PeriodicalId":413600,"journal":{"name":"2020 IEEE Security and Privacy Workshops (SPW)","volume":"89 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Security and Privacy Workshops (SPW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPW50608.2020.00044","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

Dynamic Random Access Memory (DRAM) is widely used for data storage and, when a computer system is in operation, the DRAM can contain sensitive information such as passwords and cryptographic keys. Therefore, the DRAM is a prime target for hardware-based cryptanalytic attacks. These attacks can be performed in the supply chain to capture default key mechanisms enabling a later cyber attack or predisposition the system to remote effects. Two prominent attack classes against memory are the Cold Boot attack which recovers the data from the DRAM even after a supposed power-down and Rowhammer attack which violates memory integrity by influencing the stored bits to flip. In this paper, we propose an on-chip technique that obfuscates the memory addresses and data and provides a fast detect-response to defend against these hardware-based security attacks on DRAM. We advance the prior hardware security research by making two contributions. First, the key material is detected and erased before the Cold Boot attacker can extract the memory data. Second, our solution is on-chip and does not require nor depend on additional hardware or software which are open to additional supply chain attack vectors. We analyze the efficacy of our scheme through circuit simulation and compare the results to the previous mitigation approaches based on DRAM write operations. Our simulation and analysis results show that purging key information used for address and data randomization can be achieved much faster and with lower power than with typical DRAM write techniques used for sanitizing memory content. We demonstrate through circuit simulation of the key register design a technique that clears key information within 2.4ns which is faster by more than two orders magnitude compared to typical DRAM write operations for 180nm technology, and with a power consumption of 0.15 picoWatts.
针对DRAM硬件供应链攻击的存储器保护的片上随机化
动态随机存取存储器(DRAM)被广泛用于数据存储,当计算机系统运行时,DRAM可以包含敏感信息,如密码和加密密钥。因此,DRAM是基于硬件的密码分析攻击的主要目标。这些攻击可以在供应链中执行,以捕获默认的关键机制,从而使以后的网络攻击或使系统容易受到远程影响。针对内存的两种主要攻击类型是冷启动攻击(即使在假定的断电后也能从DRAM中恢复数据)和Rowhammer攻击(通过影响存储位翻转来破坏内存完整性)。在本文中,我们提出了一种片上技术,该技术可以模糊内存地址和数据,并提供快速检测响应,以防御这些基于硬件的DRAM安全攻击。我们通过两方面的贡献来推进先前的硬件安全研究。首先,在Cold Boot攻击者能够提取内存数据之前,检测并擦除密钥材料。其次,我们的解决方案是片上的,不需要也不依赖于额外的硬件或软件,这些硬件或软件对额外的供应链攻击向量开放。我们通过电路仿真分析了该方案的有效性,并将结果与先前基于DRAM写入操作的缓解方法进行了比较。我们的模拟和分析结果表明,与用于清除内存内容的典型DRAM写入技术相比,清除用于地址和数据随机化的关键信息可以更快、更低功耗地实现。通过对键寄存器设计的电路仿真,我们展示了一种能够在2.4ns内清除键信息的技术,与采用180nm技术的典型DRAM写入操作相比,该技术的速度要快两个数量级以上,功耗为0.15皮瓦。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信