Correct-by-design CAD enhancement for EMI and signal integrity

Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525) Pub Date : 2000-03-20 DOI:10.1109/ISQED.2000.838894

E. McShane, K. Shenai

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Abstract

The monolithic integration of mixed-signal and RF microelectronics is straining the capabilities of present CAD roots for predictive analysis. In particular, the effects of di/dt, crosstalk, high-frequency impedance matching, and substrate noise pose challenges to reliable circuit operation. This is especially true as supply rail voltages continue to shrink below 2.5 V. Although PCB CAD tools have successfully addressed these issues, similar. tools have yet to penetrate the VLSIC/RFIC market due to the even greater signal frequencies and far greater network density. We describe an ongoing research effort to introduce models of these effects into a commercial CAD tool. The goal is to develop a correct-by-design CAD system in which constraints on signal crosstalk and EMI are considered along with signal delay and power restrictions in performing automated floor-planning and routing. To permit top-down synthesis of reliable systems, we are also expanding the HDL coding of digital systems to include two additional parameters: EMI victim status and EMl point-source contributions.

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设计正确的CAD增强EMI和信号完整性

混合信号和射频微电子的单片集成使当前CAD根的预测分析能力变得紧张。特别是，di/dt、串扰、高频阻抗匹配和衬底噪声的影响对可靠的电路工作提出了挑战。当供电轨电压继续缩小到2.5 V以下时尤其如此。虽然PCB CAD工具已经成功地解决了这些问题，但类似的。由于更高的信号频率和更大的网络密度，工具尚未渗透到VLSIC/RFIC市场。我们描述了一项正在进行的研究工作，将这些影响的模型引入商业CAD工具。目标是开发一种设计正确的CAD系统，该系统在执行自动地板规划和布线时考虑了信号串扰和EMI的限制以及信号延迟和功率限制。为了允许自上而下的可靠系统合成，我们还扩展了数字系统的HDL编码，以包括两个额外的参数:电磁干扰受害者状态和电磁干扰点源贡献。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Proceedings IEEE 2000 First International Symposium on Quality Electronic Design (Cat. No. PR00525)

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